Apr 2013: French consortium announces development of a clockless smartcard chip
- Tiempo, expert in the design of secured clockless chips, has initiated the collaborative project ASMART with CEA-LETI, Gemalto, Invia, LFoundry Rousset and Presto Engineering to develop an innovative smartcard chip prototype based on Tiempo secured clockless platform.
- Read the full press release here
Sep 2012: An article by Marc Renaudin in Chip Design Mag
- Chip Design Mag article: Asynchronous Design Improves Performance Process Monitoring.
- Read an article by Marc Renaudin (Tiempo's CTO) illustrating how Tiempo’s delay-insensitive asynchronous technology can boost advanced process performance and variability characterization
Jun 2012: Tiempo announces silicon validation of TESIC, Tiempo secured platform
- Tiempo, expert in the design of advanced secured chips, today announced it has proven on silicon its secured transaction platform, TESIC, manufactured on TSMC 130 nm LP process.
- Read the full press release here
Jun 2012: Tiempo, working with STMicroelectronics, unveils first 32nm clockless test chip
- Tiempo, working closely with STMicroelectronics, announced the first fully clockless and delay-insensitive circuit in 32nm. The chip was fabricated as first-time-right silicon, with all chip samples 100% functional.
- Asynchronous circuit demonstrates unprecedented robustness to process variation on 32nm technology, paving the way for first-time-right silicon for advanced process nodes
- Read the full press release here
Apr 2012: Tiempo and Alcinéo announce partnership for smartcard applications
- Tiempo and Alcinéo, specialist in secure payment solutions, have signed an agreement to develop smartcard applications on Tiempo prototype platform.
- Read full press release here